|PORTALUPPI DAVIDE||Cycle: XXXI |
Tutor: GERACI ANGELO Major Research topic
:Microelectronics and Instrumentation for Single-Photon Imaging
Advisor: ZAPPA FRANCOAbstract:
In the last years, an increasing number of applications have emerged which can significantly benefit from the ability of detecting fast (sub ns range), faint light signals, requiring sensitivity down to the single-photon level. These applications range from industrial and automotive uses, such as object or obstacle recognition, road safety, depth-resolved ambient surveillance, to biomedical applications like fluorescence lifetime microscopy or time-resolved spectroscopy, to consumer applications such as gaming and gesture recognition.
Arrays of Single-Photon Avalanche Diodes (SPADs) are an attractive sensor choice for these applications, due to their high detection efficiency, relatively low voltage operation, high timing resolution and compatibility with standard CMOS fabrication processes, thus allowing the development and exploitation of monolithic circuits integrating both sensor and processing electronics.
This PhD project aims at developing new CMOS SPAD imaging chips able to satisfy the numerous requirements that arise from such a varied set of applications, such as integrating high resolution (tens of ps) time measurement capabilities, time-gating of the incoming photons or ambient light rejection. Such imagers will be able to acquire both 2D ¿intensity¿ information as well as measuring the time of arrival of incoming photons, which can be exploited to reconstruct 3D ¿ranging¿ images by means of Time-of-Flight techniques, or to extract information about the detected optical signal, employing e.g. Time-Correlated Single-Photon Counting techniques.
Another aim of this project is to develop methods to reduce and manage the amount of data generated by a large size time-resolved SPAD imager without impacting on its performances, both on-chip and at system level. Data pre-processing algorithms will then be implemented at system level, using reconfigurable FPGA devices, allowing to tune the complete system for each application in which it will be employed. \n\n