|NATALE GIUSEPPE||Cycle: XXXI |
Section: Computer Science and Engineering
Tutor: BOLCHINI CRISTIANA Major Research topic
:Scalable dataflow computing on reconfigurable architectures
Advisor: SANTAMBROGIO MARCO DOMENICOAbstract:
We are approaching the end of Moore's Law, while demand for computing power increases constantly. Traditional processors are struggling to keep up with performance requirements, and both scientific research and industry are exploring reconfigurable architectures as an alternative. It is common knowledge that an increasing number of technology leaders, such as Microsoft, IBM, Intel, Google, Amazon to name a few, are currently exploring the employment of reconfigurable architectures as hardware accelerators. Fine grained inherent parallelism and low power consumption thanks to direct hardware execution are the key aspects that make reconfigurable architectures an attractive choice for high performance computing. In my research effort I am investigating the employment of reconfigurable architectures, such as FPGAs, as a form of accelerator. In particular, I am focused on dataflow computing, as it is a natural fit with reconfigurable architectures. Since the cost of data movement is what is usually constraining today's systems performance, bringing data and computation closer by employing a dataflow model can be very beneficial. I am leveraging the fact that computation is mapped in space onto the reconfigurable array, exploring the design of multiple dataflow solutions, with reliable scalability properties, for different algorithms in scientific and industrial computing.