|STORNAIUOLO LUCA||Cycle: XXXIII |
Section: Computer Science and Engineering
Tutor: SILVANO CRISTINA
Advisor: SCIUTO DONATELLA Major Research topic
:Hardware/Software Co-design for Scientific Computing and Convolutional Neural Networks on FPGA-based Embedded ArchitecturesAbstract:
FPGAs are increasingly used in embedded heterogeneous architectures as they provide high computational power, low power consumption, flexibility, and adaptability thanks to their reconfiguration property. The rapid evolution of fields such as Machine Learning, Statistical Computing, and Biomedical Computing, along with the ending of Moore's era, is moving the attention of industry and academia towards less traditional computer architectures that can satisfy the ever-increasing need for high computational power and low power consumption, with FPGAs being a promising solution. However, owing to the learning curve required to implement FPGA-based accelerators, the number of applications that benefit from their use is quite small. Although the technology of these devices continues to evolve, their difficulty in use is still preventing them from spreading widely. Today, it is a frustrating task to integrate FPGA-based hardware accelerators into software-based applications. The design flow currently available demands specialized expertise and mastery of low-level techniques that are actually out of reach for most software developers, and while High Level Synthesis tools reduce certain complexities through the use of High Level Languages (HLLs), the whole integration process remains complicated and not very automated. To solve the FPGA-based Heterogeneous System Architectures programmability and usability challenges, this thesis focuses on the formalization and implementation of techniques and tools to develop and exploit accelerators that take advantage of reconfigurable embedded architectures and integrate them within more complex heterogeneous infrastructures. The goal is to provide efficient and high-performance FPGA-based implementations ready to be used transparently by software developers within their applications written in HLLs. At the same time, this thesis aims at providing new workflows and innovative techniques to hardware developers in order to optimize specific domain functions and to distribute their designs ready to be integrated by end users. The domains analyzed in this work concern Scientific Computing and Convolutional Neural Networks.