|Thesis abstract: |
The complexity and diversity of today's parallel architectures overly burdens application programmers in porting and tuning their code. Tuning the resources and mapping the software code to the architecture has always been at the high cost of wasting precious resources which motivates application programmers to devote significant time and energy to tuning their codes. This tuning process must be largely repeated to move from one architecture to another, as too often, a code that performs well on one architecture faces bottlenecks on another. As we are entering the era of petascale systems, the challenges facing application programmers in obtaining acceptable performance on their codes will only grow. Therefore, the doctoral thesis will tackle the compiler optimization issue by auto-tuning techniques in design space exploration method to further enhance the process and reach better trade-offs regarding power, performance and area.