|Thesis abstract: |
Until now a large scale of integration for the photonics integrated circuits hasn¿t been achieved due to the lack of several important building blocks that allow control and reconfiguration of circuits composed by hundreds of devices. This research project is inserted in the European FET project BBOI that aims to overcome the actual limitation. The objective is the ideation, design and characterization of these building blocks in collaboration with an European consortium. The Ph.D. project is inserted in the ¿Breaking the Barrier of Optical Integration¿ European project (BBOI, www.BBOI.eu) that sees the PoliFab as a major player since is both a partner and the supervisor of the project. Several partners throughout Europe are active part of this project; the long-term vision of the BBOI project is aligned with the so-called ¿More than Moore¿ direction, where the aggregation of many different functions integrated in the same circuit is pursued as an alternative route to the search for extreme miniaturization and scalability of single devices. The objective of the research project is the ¿Technological development for the implementation of the control layer in photonics integrated circuits¿; control layer means all the components, controller and actuator added to the silicon waveguide that allow to surpass the actual limitation of the PICs; in particular the technologies that are intended to be added to the silicon waveguides layer are: (1) non-perturbative probes are based on a technology in development that uses ultra-sensitive nanoscale electronic metrology applied to photonic devices, (2) ¿Self-holding¿ actuators, that does not need an always on active control to be set and, will be realized through the merging of silicon photonics with nanoionic mixed ionic and electronic conductors (MIECs), (3) ¿Set & forget¿ trimming technologies, providing a tool to compensate permanently the fabrication tolerances, will be realized with the application of a trimmable material to the silicon waveguides. Defining the control layer involves the design of the various building blocks to maximize their performances and the compatibility with the silicon waveguides, the characterization of the new building blocks and the development of a fabrication process that can combines the new materials and designs with the silicon waveguides layer.