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Bluetooth Low Energy (BLE) is a wireless personal-area-network technology designed and marketed by the Bluetooth Special Interest Group (Bluetooth SIG) aimed at novel applications in IoT, wearables, healthcare, security, and home entertainment industries.

The frequency synthesizer is a key component of the BLE radio frontend. In fact, on top of providing the Local Oscillator (LO) signal, the synthesizer is also acting as direct modulator of the whole Transceiver (TX), therefore becoming the heart of the whole BLE radio. Digital assisted RF techniques applied to the frequency synthesizer have the potential to push the performance of the BLE system beyond the performance of available solutions [1]-[4], characterized by analog-PLL based frequency synthesizers. The addition of a Digital-to-Time Converter (DTC) on the reference path, combined with the digital calibration enabled by the auxiliary loop, enables fine fractional frequency synthesis with excellent spur performance. The DTC may also be leveraged to introduce an arbitrary phase offset between the input reference signal and the output signal, thereby providing an attractive solution to the phase shifting conundrum.

References:
[1] E. Bechthum et al., "30.6 A Low-Power BLE Transceiver with Support for Phase-Based Ranging, Featuring 5µs PLL Locking Time and 5.3ms Ranging Time, Enabled by Staircase-Chirp PLL with Sticky-Lock Channel-Switching," 2020 IEEE International Solid- State Circuits Conference - (ISSCC), 2020, pp. 470-472.
[2] S. Kundu et al., "A 2-to-2.48GHz Voltage-Interpolator-Based Fractional-N Type-I Sampling PLL in 22nm FinFET Assisting Fast Crystal Startup," 2022 IEEE International Solid- State Circuits Conference (ISSCC), 2022, pp. 144-146.
[3] H. Liu et al., "An ADPLL-centric bluetooth low-energy transceiver with 2.3mW interference-tolerant hybrid-loop receiver and 2.9mW single-point polar transmitter in 65nm CMOS," 2018 IEEE International Solid - State Circuits Conference - (ISSCC), 2018, pp. 444-446.
[4] N. Pourmousavian et al., "A 0.5-V 1.6-mW 2.4-GHz Fractional-N All-Digital PLL for Bluetooth LE With PVT-Insensitive TDC Using Switched-Capacitor Doubler in 28-nm CMOS," in IEEE Journal of Solid-State Circuits, vol. 53, no. 9, pp. 2572-2583, Sept. 2018.